The present invention relates generally to semiconductor devices, and more particularly to power distribution connections between the device package and an integrated circuit die.
According to some conventional designs for semiconductor devices an integrated circuit (IC) die is mounted on a substrate within a package housing with bond wires providing electrical connections between bond pads on the substrate and bond pads located around the periphery of the top surface of the die. Some of those electrical connections are for transmitting signals to and from the die, while others are for providing power to the die in the form of power supply and ground voltages.
In a conventional packaged semiconductor device, a bond wire power connection (i.e., either power supply or ground voltage) involves a bond wire connecting a power supply bond pad on the substrate to a power supply bond pad on the periphery of the top surface of the die. The voltage is then routed horizontally and/or vertically into the die using metal traces within the die's bond pad layer and/or metal vias to one or more locations within one or more particular die layers within the interior of the die where that voltage is needed.
In order to keep IC dies as small as possible, die layers are kept as thin as possible, and the area of the die layers is kept as small as possible. As a result, the resistances of the conductive traces used to propagate power currents within the die layers are relatively high, resulting in relatively high IR drop. The present invention provides an improved method of routing power and ground voltages from the device leads to the integrated circuit die.